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DAC
2001
ACM
16 years 4 days ago
Future Performance Challenges in Nanometer Design
We highlight several fundamental challenges to designing highperformance integrated circuits in nanometer-scale technologies (i.e. drawn feature sizes < 100 nm). Dynamic power ...
Dennis Sylvester, Himanshu Kaul
DAC
1999
ACM
16 years 4 days ago
Converting a 64b PowerPC Processor from CMOS Bulk to SOI Technology
A 550MHz 64b PowerPC processor was developed for fabrication in Silicon-On-Insulator (SOI) technology from a processor previously designed and fabricated in bulk CMOS [1]. Both th...
D. Allen, D. Behrends, B. Stanisic
DAC
1998
ACM
16 years 4 days ago
Figures of Merit to Characterize the Importance of On-Chip Inductance
- A closed form solution for the output signal of a CMOS inverter driving an RLC transmission line is presented. This solution is based on the alpha power law for deep submicromete...
Yehea I. Ismail, Eby G. Friedman, José Luis...
DAC
2002
ACM
16 years 4 days ago
HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery
This paper proposes a general hierarchical analysis methodology, HiPRIME, to efficiently analyze RLKC power delivery systems. After partitioning the circuits into blocks, we devel...
Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Ch...
DAC
2000
ACM
16 years 4 days ago
MINFLOTRANSIT: min-cost flow based transistor sizing tool
This paper presents MINFLOTRANSIT, a new transistor sizing tool for fast sizing of combinational circuits with minimal cost. MINFLOTRANSIT is an iterative relaxation based tool th...
Vijay Sundararajan, Sachin S. Sapatnekar, Keshab K...