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DAC
2005
ACM
16 years 4 days ago
Scalable trajectory methods for on-demand analog macromodel extraction
Trajectory methods sample the state trajectory of a circuit as it simulates in the time domain, and build macromodels by reducing and interpolating among the linearizations create...
Saurabh K. Tiwary, Rob A. Rutenbar
DAC
2006
ACM
16 years 4 days ago
Optimal simultaneous mapping and clustering for FPGA delay optimization
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
Joey Y. Lin, Deming Chen, Jason Cong
114
Voted
CODES
2005
IEEE
15 years 4 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
74
Voted
FPGA
2006
ACM
129views FPGA» more  FPGA 2006»
15 years 2 months ago
Power-aware RAM mapping for FPGA embedded memory blocks
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
Russell Tessier, Vaughn Betz, David Neto, Thiagara...
LICS
1996
IEEE
15 years 3 months ago
Reactive Modules
We present a formal model for concurrent systems. The model represents synchronous and asynchronous components in a uniform framework that supports compositional (assume-guarantee)...
Rajeev Alur, Thomas A. Henzinger