471 search results - page 54 / 95 » Automated Design of Misaligned-Carbon-Nanotube-Immune Circui... |
124
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TCAD
2010
14 years 6 months ago
2010
Design debugging is a major bottleneck in modern VLSI design flows as both the design size and the length of the error trace contribute to its inherent complexity. With typical des...
131
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DAC
2006
ACM
16 years 4 days ago
2006
ACM
This paper presents analysis methods for energy estimation in RC trees driven by time-varying voltage sources, e.g., buffers, timevarying power supplies, and resonant clock genera...
119
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DATE
2009
IEEE
15 years 3 months ago
2009
IEEE
The inherent reconfigurability of SRAM-based FPGAs enables the use of configurations optimized for the problem at hand. Optimized configurations are smaller and faster than their g...
103
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DAC
2003
ACM
16 years 4 days ago
2003
ACM
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
ISSS
1999
IEEE
15 years 3 months ago
1999
IEEE
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...