471 search results - page 75 / 95 » Automated Design of Misaligned-Carbon-Nanotube-Immune Circui... |
71
Voted
DAC
1999
ACM
16 years 2 days ago
1999
ACM
- Closed form solutions for the 50% delay, rise time, overshoots, and settling time of signals in an RLC tree are presented. These solutions have the same accuracy characteristics ...
DAC
2001
ACM
16 years 2 days ago
2001
ACM
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuit...
GLVLSI
2005
IEEE
15 years 4 months ago
2005
IEEE
As timing requirements in today’s advanced VLSI designs become more aggressive, the need for automated tools to diagnose timing failures increases. This work presents two such a...
89
Voted
DAC
2008
ACM
16 years 3 days ago
2008
ACM
In modular testing of system-on-a-chip (SoC), test access mechanisms (TAMs) are used to transport test data between the input/output pins of the SoC and the cores under test. Prio...
116
click to vote
DAC
2004
ACM
16 years 2 days ago
2004
ACM
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...