471 search results - page 84 / 95 » Automated Design of Misaligned-Carbon-Nanotube-Immune Circui... |
DAC
2005
ACM
16 years 2 days ago
2005
ACM
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
CP
2008
Springer
15 years 6 days ago
2008
Springer
Rectangle (square) packing problems involve packing all squares with sizes 1 × 1 to n × n into the minimum area enclosing rectangle (respectively, square). Rectangle packing is a...
74
Voted
DAC
2009
ACM
16 years 3 days ago
2009
ACM
State-of-the-art integral-equation-based solvers rely on techniques that can perform a matrix-vector multiplication in O(N) complexity. In this work, a fast inverse of linear comp...
DAC
2008
ACM
16 years 3 days ago
2008
ACM
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
82
Voted
DAC
1999
ACM
16 years 2 days ago
1999
ACM
Recently, several algorithms for interconnect optimization via repeater insertion and wire sizing have appeared based on the Elmore delay model. Using the Devgan noise metric [6] ...