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DAC
2005
ACM
16 years 24 days ago
FLEXBUS: a high-performance system-on-chip communication architecture with a dynamically configurable topology
In this paper, we describe FLEXBUS, a flexible, high-performance onchip communication architecture featuring a dynamically configurable topology. FLEXBUS is designed to detect run...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
KBSE
2007
IEEE
15 years 6 months ago
Checking threat modeling data flow diagrams for implementation conformance and security
Threat modeling analyzes how an adversary might attack a system by supplying it with malicious data or interacting with it. The analysis uses a Data Flow Diagram (DFD) to describe...
Marwan Abi-Antoun, Daniel Wang, Peter Torr
ICCAD
1998
IEEE
130views Hardware» more  ICCAD 1998»
15 years 4 months ago
GPCAD: a tool for CMOS op-amp synthesis
We present a method for optimizing and automating component and transistor sizing for CMOS operational amplifiers. We observe that a wide variety of performance measures can be fo...
Maria del Mar Hershenson, Stephen P. Boyd, Thomas ...
PVLDB
2010
168views more  PVLDB 2010»
14 years 10 months ago
Active Complex Event Processing: Applications in Real-Time Health Care
Our analysis of many real-world event based applications has revealed that existing Complex Event Processing technology (CEP), while effective for efficient pattern matching on e...
Di Wang, Elke A. Rundensteiner, Richard Ellison, H...
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
15 years 3 months ago
Warning: Launch off Shift Tests for Delay Faults May Contribute to Test Escapes
- Two methods to apply tests to detect delay faults in standard scan designs are used. One is called launch off capture and the other is called launch off shift. Launch off shift t...
Zhuo Zhang, Sudhakar M. Reddy, Irith Pomeranz