119 search results - page 15 / 24 » Automated Modeling of Custom Digital Circuits for Test |
100
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DAC
2005
ACM
16 years 9 days ago
2005
ACM
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
108
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ISPD
2005
ACM
15 years 4 months ago
2005
ACM
Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. With thes...
108
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DAC
2005
ACM
16 years 9 days ago
2005
ACM
Small, embedded integrated circuits (ICs) such as smart cards are vulnerable to so-called side-channel attacks (SCAs). The attacker can gain information by monitoring the power co...
109
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JSA
2007
14 years 11 months ago
2007
Mapping of applications on a Multiprocessor System-on-Chip (MP-SoC) is a crucial step to optimize performance, energy and memory constraints at the same time. The problem is formu...
CONSTRAINTS
2007
14 years 11 months ago
2007
In the ECAD area, the Test Generation (TG) problem consists in finding an input vector test for some possible diagnosis (a set of faults) of a digital circuit. Such tests may have ...