Traditionally, rectilinear Steiner minimum trees (RSMT) are widely used for routing estimation in design optimizations like floorplanning and physical synthesis. Since it optimize...
Charles J. Alpert, Andrew B. Kahng, Cliff C. N. Sz...
As the technology node advances into the nanometer era, via-open defects are one of the dominant failures. To improve via yield and reliability, redundant-via insertion is a highl...
In this paper, we propose a new global router, BoxRouter, powered by the concept of box expansion and progressive integer linear programming (ILP). BoxRouter first uses a simple P...
Graphics-intensive computer games are no longer restricted to highperformance desktops, but are also available on a variety of portable devices ranging from notebooks to PDAs and ...
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...