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HPCA
2006
IEEE
15 years 10 months ago
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
David A. Penry, Daniel Fay, David Hodgdon, Ryan We...
97
Voted
CADE
2005
Springer
15 years 10 months ago
Privacy-Sensitive Information Flow with JML
In today's society, people have very little control over what kinds of personal data are collected and stored by various agencies in both the private and public sectors. We de...
Guillaume Dufay, Amy P. Felty, Stan Matwin
ICSE
2007
IEEE-ACM
15 years 10 months ago
Using GUI Run-Time State as Feedback to Generate Test Cases
This paper presents a new automated model-driven technique to generate test cases by using feedback from the execution of a "seed test suite" on an application under tes...
Xun Yuan, Atif M. Memon
EUROSYS
2010
ACM
15 years 7 months ago
Reverse Engineering of Binary Device Drivers with RevNIC
This paper presents a technique that helps automate the reverse engineering of device drivers. It takes a closed-source binary driver, automatically reverse engineers the driverâ€...
Vitaly Chipounov, George Candea
99
Voted
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
15 years 7 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz