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» Automated RTR Temporal Partitioning for Reconfigurable Embed...
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83
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IPPS
2003
IEEE
15 years 6 months ago
Automated RTR Temporal Partitioning for Reconfigurable Embedded Real-Time System Design
Camel Tanougast, Yves Berviller, Philippe Brunet, ...
92
Voted
DAC
2008
ACM
16 years 2 months ago
An 8x8 run-time reconfigurable FPGA embedded in a SoC
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
Sumanta Chaudhuri, Sylvain Guilley, Florent Flamen...
124
Voted
IWSOC
2003
IEEE
137views Hardware» more  IWSOC 2003»
15 years 6 months ago
Hardware Partitioning Software for Dynamically Reconfigurable SoC Design
CAD tools support is essential in the success of today digital system design methodologies. Unfortunately, most of the classical design tools do not take into account the possibil...
Philippe Brunet, Camel Tanougast, Yves Berviller, ...
107
Voted
DAC
1998
ACM
16 years 2 months ago
Rate Derivation and Its Applications to Reactive, Real-Time Embedded Systems
An embedded system the system continuously interacts with its environment under strict timing constraints, called the external constraints, and it is important to know how these e...
Ali Dasdan, Dinesh Ramanathan, Rajesh K. Gupta
107
Voted
FPGA
2004
ACM
140views FPGA» more  FPGA 2004»
15 years 4 months ago
Using reconfigurability to achieve real-time profiling for hardware/software codesign
Embedded systems combine a processor with dedicated logic to meet design specifications at a reasonable cost. The attempt to amalgamate two distinct design environments introduces...
Lesley Shannon, Paul Chow