In automated synthesis, we transform a specification into a system that is guaranteed to satisfy the specification. In spite of the rich theory developed for temporal synthesis, l...
The goal of this note is to provide a background and references for the invited lecture presented at Computer Science Logic 2006. We briefly discuss motivations that led to the eme...
Abstract. Automated verification of multi-threaded programs is difficult. Direct treatment of all possible thread interleavings by reasoning about the program globally is a prohib...
This paper introduces power default reasoning (PDR), a framework for nonmonotonic reasoning based on the domain-theoretic idea of modeling default rules with partial-information i...
This paper describes a default-logic framework (plausibility schemas) and software tools (Decision ApprenticeTM and Legal ApprenticeTM ) for modeling, guiding and automating the r...