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DAC
2004
ACM
15 years 10 months ago
Multiple constant multiplication by time-multiplexed mapping of addition chains
An important primitive in the hardware implementations of linear DSP transforms is a circuit that can multiply an input value by one of several different preset constants. We prop...
James C. Hoe, Markus Püschel, Peter Tummeltsh...
76
Voted
EH
2004
IEEE
125views Hardware» more  EH 2004»
15 years 1 months ago
Routine High-Return Human-Competitive Evolvable Hardware
This paper reviews the use of genetic programming as an automated invention machine for the synthesis of both the topology and sizing of analog electrical circuits. The paper focu...
John R. Koza, Martin A. Keane, Matthew J. Streeter
92
Voted
DAC
2003
ACM
15 years 10 months ago
Distributed sleep transistor network for power reduction
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
Changbo Long, Lei He
DATE
2010
IEEE
148views Hardware» more  DATE 2010»
15 years 2 months ago
Intent-leveraged optimization of analog circuits via homotopy
—This paper proposes a circuit optimization approach that can ease the computational burden on the simulation-based circuit optimizers by leveraging simple design equations that ...
Metha Jeeradit, Jaeha Kim, Mark Horowitz
FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
15 years 6 months ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...