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ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
14 years 7 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
60
Voted
DAC
2004
ACM
15 years 10 months ago
Automated design of operational transconductance amplifiers using reversed geometric programming
We present a method for designing operational amplifiers using reversed geometric programming, which is an extension of geometric programming that allows both convex and non-conve...
Johan P. Vanderhaegen, Robert W. Brodersen
107
Voted
DAC
2008
ACM
15 years 10 months ago
On the role of timing masking in reliable logic circuit design
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...
Smita Krishnaswamy, Igor L. Markov, John P. Hayes
ASYNC
2005
IEEE
174views Hardware» more  ASYNC 2005»
15 years 3 months ago
Delay Insensitive Encoding and Power Analysis: A Balancing Act
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...
Konrad J. Kulikowski, Ming Su, Alexander B. Smirno...
ASPDAC
2009
ACM
152views Hardware» more  ASPDAC 2009»
15 years 4 months ago
A novel Toffoli network synthesis algorithm for reversible logic
—Reversible logic studies have promising potential on energy lossless circuit design, quantum computation, nanotechnology, etc. Reversible logic features a one-to-one input outpu...
Yexin Zheng, Chao Huang