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FPGA
2007
ACM
106views FPGA» more  FPGA 2007»
15 years 5 months ago
A synthesizable datapath-oriented embedded FPGA fabric
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai ...
DAC
2000
ACM
16 years 18 days ago
The use of carry-save representation in joint module selection and retiming
Joint module selection and retiming is a powerful technique to optimize the implementation cost and the speed of a circuit specified using a synchronous data-flow graph (DFG). In ...
Zhan Yu, Kei-Yong Khoo, Alan N. Willson Jr.
ET
2010
89views more  ET 2010»
14 years 10 months ago
On the Duality of Probing and Fault Attacks
In this work we investigate the problem of simultaneous privacy and integrity protection in cryptographic circuits. We consider a white-box scenario with a powerful, yet limited at...
Berndt M. Gammel, Stefan Mangard
DAC
2008
ACM
16 years 19 days ago
Bi-decomposing large Boolean functions via interpolation and satisfiability solving
Boolean function bi-decomposition is a fundamental operation in logic synthesis. A function f(X) is bi-decomposable under a variable partition XA, XB, XC on X if it can be written...
Ruei-Rung Lee, Jie-Hong Roland Jiang, Wei-Lun Hung
DAC
2007
ACM
16 years 19 days ago
SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects
The test time for core-external interconnect shorts/opens is typically much less than that for core-internal logic. Therefore, prior work on test infrastructure design for core-ba...
Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty