322 search results - page 52 / 65 » Automated Synthesis of Optimized Circuits for Secure Computa... |
DAC
2003
ACM
15 years 10 months ago
2003
ACM
Delay budget is an excess delay each component of a design can tolerate under a given timing constraint. Delay budgeting has been widely exploited to improve the design quality. W...
FPGA
1999
ACM
15 years 1 months ago
1999
ACM
Multi-FPGA systems are used as custom computing machines to solve compute intensive problems and also in the verification and prototyping of large circuits. In this paper, we addr...
76
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ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
Abstract-- SAT sweeping is the process of merging two or more functionally equivalent nodes in a circuit by selecting one of them to represent all the other equivalent nodes. This ...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
In this paper, we propose TROY, the first track router with yield-driven wire planning to optimize yield loss due to random defects. As the probability of failure (POF) computed f...
136
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DAC
2005
ACM
15 years 10 months ago
2005
ACM
Pointer analysis, a classic problem in software program analysis, has emerged as an important problem to solve in design automation, at a time when complex designs, specified in t...