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ICSE
2004
IEEE-ACM
15 years 10 months ago
Assume-Guarantee Verification of Source Code with Design-Level Assumptions
Model checking is an automated technique that can be used to determine whether a system satisfies certain required properties. To address the "state explosion" problem a...
Dimitra Giannakopoulou, Corina S. Pasareanu, Jamie...
SIES
2007
IEEE
15 years 4 months ago
Design Space Exploration with Evolutionary Multi-Objective Optimisation
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
Martin Holzer 0002, Bastian Knerr, Markus Rupp
MSE
2005
IEEE
150views Hardware» more  MSE 2005»
15 years 3 months ago
A Cohesive FPGA-Based System-on-Chip Design Curriculum
A graduate-level computer engineering course sequence at the OGI School of Science and Engineering teaches state-of-the-art digital system design practices and system-on-chip desi...
John D. Lynch, Daniel Hammerstrom, Roy Kravitz
DLOG
2004
14 years 11 months ago
Semantics Driven Support for Query Formulation
In this paper we describe the principles of the design and development of an intelligent query interface, done in the context of the SEWASIE (SEmantic Webs and AgentS in Integrate...
Paolo Dongilli, Enrico Franconi, Sergio Tessaris
DAC
1999
ACM
15 years 2 months ago
Panel: What is the Proper System on Chip Design Methodology
ion model or flexible PCB solutions cannot offer a valid solution for the next millinium SoCs . James G. Dougherty, Integrated Systems Silicon LTD, Belfast, Northern Ireland ISS an...
Richard Goering, Pierre Bricaud, James G. Doughert...