3424 search results - page 513 / 685 » Automated Testing of Classes |
156
Voted
DAC
2008
ACM
2008
ACM
Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts
16 years 5 months ago
End-to-end latency of messages is an important design parameter that needs to be within specified bounds for the correct functioning of distributed real-time control systems. In t...
141
click to vote
DAC
2008
ACM
16 years 5 months ago
2008
ACM
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
153
click to vote
DAC
2008
ACM
16 years 5 months ago
2008
ACM
1 Soft errors induced by radiation are an increasing problem in the microelectronic field. Although traditional models estimate the reliability of memories suffering Single Event U...
135
Voted
DAC
1999
ACM
16 years 5 months ago
1999
ACM
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...
135
click to vote
DAC
2000
ACM
16 years 5 months ago
2000
ACM
We revisit a basic element of modern signal integrity analysis, the modeling of worst-case coupling capacitance effects within a switch factor (SF) based methodology. We show that...