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DAC
2005
ACM
16 years 5 months ago
Robust gate sizing by geometric programming
We present an efficient optimization scheme for gate sizing in the presence of process variations. Using a posynomial delay model, the delay constraints are modified to incorporat...
Jaskirat Singh, Vidyasagar Nookala, Zhi-Quan Luo, ...
DAC
2006
ACM
16 years 5 months ago
Statistical timing based on incomplete probabilistic descriptions of parameter uncertainty
Existing approaches to timing analysis under uncertainty are based on restrictive assumptions. Statistical STA techniques assume that the full probabilistic distribution of parame...
Wei-Shen Wang, Vladik Kreinovich, Michael Orshansk...
DAC
2006
ACM
16 years 5 months ago
Prototyping a fault-tolerant multiprocessor SoC with run-time fault recovery
Modern integrated circuits (ICs) are becoming increasingly complex. The complexity makes it difficult to design, manufacture and integrate these high-performance ICs. The advent o...
Xinping Zhu, Wei Qin
ICML
1998
IEEE
16 years 5 months ago
Bayesian Network Classification with Continuous Attributes: Getting the Best of Both Discretization and Parametric Fitting
In a recent paper, Friedman, Geiger, and Goldszmidt [8] introduced a classifier based on Bayesian networks, called Tree Augmented Naive Bayes (TAN), that outperforms naive Bayes a...
Moisés Goldszmidt, Nir Friedman, Thomas J. ...
ICSE
2008
IEEE-ACM
16 years 5 months ago
A verification system for timed interval calculus
Timed Interval Calculus (TIC) is a highly expressive set-based notation for specifying and reasoning about embedded real-time systems. However, it lacks mechanical proving support...
Chunqing Chen, Jin Song Dong, Jun Sun 0001
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