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ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
15 years 8 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
ILP
2007
Springer
15 years 5 months ago
Structural Statistical Software Testing with Active Learning in a Graph
Structural Statistical Software Testing (SSST) exploits the control flow graph of the program being tested to construct test cases. Specifically, SSST exploits the feasible paths...
Nicolas Baskiotis, Michèle Sebag
ASAP
2005
IEEE
133views Hardware» more  ASAP 2005»
15 years 5 months ago
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
WCRE
2003
IEEE
15 years 4 months ago
Reconstructing Software Architecture for J2EE Web Applications
In this paper we describe our approach to reconstructing the software architecture of J2EE web applications. We use the Siemens Four Views approach, separating the architecture in...
Minmin Han, Christine Hofmeister, Robert L. Nord
IEEEINTERACT
2002
IEEE
15 years 4 months ago
Compiling for Fine-Grain Concurrency: Planning and Performing Software Thread Integration
Embedded systems require control of many concurrent real-time activities, leading to system designs which feature multiple hardware peripherals with each providing a specific, ded...
Alexander G. Dean