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» Automated synthesis for asynchronous FPGAs
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DAC
2007
ACM
15 years 10 months ago
DDBDD: Delay-Driven BDD Synthesis for FPGAs
Lei Cheng, Deming Chen, Martin D. F. Wong
DAC
1999
ACM
15 years 10 months ago
Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems
Alex Kondratyev, Jordi Cortadella, Michael Kishine...
ACSD
2005
IEEE
144views Hardware» more  ACSD 2005»
15 years 3 months ago
An Automated Fine-Grain Pipelining Using Domino Style Asynchronous Library
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
Alexander B. Smirnov, Alexander Taubin, Ming Su, M...
DAC
2003
ACM
15 years 10 months ago
Global resource sharing for synthesis of control data flow graphs on FPGAs
Seda Ogrenci Memik, Gokhan Memik, Roozbeh Jafari, ...