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» Automated test generation for industrial Erlang applications
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FCCM
2011
IEEE
331views VLSI» more  FCCM 2011»
14 years 3 months ago
Synthesis of Platform Architectures from OpenCL Programs
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
Muhsen Owaida, Nikolaos Bellas, Konstantis Dalouka...
ITC
2002
IEEE
81views Hardware» more  ITC 2002»
15 years 4 months ago
Design Rewiring Using ATPG
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
CONCUR
2006
Springer
15 years 3 months ago
A Livelock Freedom Analysis for Infinite State Asynchronous Reactive Systems
We describe an incomplete but sound and efficient livelock freedom test for infinite state asynchronous reactive systems. The method s a system into a set of simple control flow cy...
Stefan Leue, Alin Stefanescu, Wei Wei
ATAL
2005
Springer
15 years 5 months ago
PowerMatcher: multiagent control in the electricity infrastructure
Different driving forces push the electricity production towards decentralization. As a result, the current electricity infrastructure is expected to evolve into a network of netw...
J. K. Kok, C. J. Warmer, I. G. Kamphuis
ICDM
2003
IEEE
184views Data Mining» more  ICDM 2003»
15 years 5 months ago
Detecting Patterns of Change Using Enhanced Parallel Coordinates Visualization
Analyzing data to find trends, correlations, and stable patterns is an important problem for many industrial applications. In this paper, we propose a new technique based on paral...
Kaidi Zhao, Bing Liu, Thomas M. Tirpak, Andreas Sc...