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» Automated test generation for industrial Erlang applications
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ICCAD
2002
IEEE
112views Hardware» more  ICCAD 2002»
15 years 4 months ago
ATPG-based logic synthesis: an overview
The ultimate goal of logic synthesis is to explore implementation flexibility toward meeting design targets, such as area, power, and delay. Traditionally, such flexibility is exp...
Chih-Wei Jim Chang, Malgorzata Marek-Sadowska
ICSE
2008
IEEE-ACM
15 years 12 months ago
Continuous software quality supervision using SourceInventory and Columbus
Several tools and methods for source code quality assurance based on static analysis finally reached a state when they are applicable in practice and recognized by the industry. H...
Árpád Beszédes, Rudolf Ferenc...
ISCAS
2006
IEEE
106views Hardware» more  ISCAS 2006»
15 years 5 months ago
Integrating observability don't cares in all-solution SAT solvers
— All-solution Boolean satisfiability (SAT) solvers are engines employed to find all the possible solutions to a SAT problem. Their applications are found throughout the EDA in...
Sean Safarpour, Andreas G. Veneris, Rolf Drechsler
RSP
2005
IEEE
155views Control Systems» more  RSP 2005»
15 years 5 months ago
Optimization Techniques for ADL-Driven RTL Processor Synthesis
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
Oliver Schliebusch, Anupam Chattopadhyay, Ernst Ma...
AE
2003
Springer
15 years 5 months ago
The Evolutionary Control Methodology: An Overview
The ideas proposed in this work are aimed to describe a novel approach based on artificial life (alife) environments for on-line adaptive optimisation of dynamical systems. The bas...
Mauro Annunziato, Ilaria Bertini, M. Lucchetti, Al...