557 search results - page 19 / 112 » Automatic Abstraction for Verification of Timed Circuits and... |
CODES
1997
IEEE
15 years 1 months ago
1997
IEEE
Abstract Felice Balarin Massimiliano Chiodoy Attila Jurecskaz Luciano Lavagno Bassam Tabbarax Alberto Sangiovanni-Vincentelli April 28, 1997
AHS
2006
IEEE
15 years 3 months ago
2006
IEEE
The paper presents a novel integrated system in which a number of image processing algorithm are embedded within a Genetic Algorithm (GA) based framework in order to provide an ad...
TPHOL
1998
IEEE
15 years 1 months ago
1998
IEEE
Abstract. Over the last decade, the increasing demand for the validation of safety critical systems lead to the development of domain-specific programming languages (e.g. synchrono...
FMSD
2000
14 years 9 months ago
2000
We review a number of formal verification techniques supported by STeP, the Stanford Temporal Prover, describing how the tool can be used to verify properties of several versions o...
TCAD
2002
14 years 9 months ago
2002
As very large scale integration (VLSI) circuit speed rapidly increases, the inductive effects of interconnect lines strongly impact the signal integrity of a circuit. Since these i...