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» Automatic Abstraction for Verification of Timed Circuits and...
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FUIN
2006
85views more  FUIN 2006»
14 years 9 months ago
Towards Integrated Verification of Timed Transition Models
Abstract. This paper describes an attempt to combine theorem proving and model-checking to formally verify real-time systems in a discrete time setting. The Timed Automata Modeling...
Mark Lawford, Vera Pantelic, Hong Zhang
ASE
2005
103views more  ASE 2005»
14 years 9 months ago
Component Verification with Automatically Generated Assumptions
Abstract. Model checking is an automated technique that can be used to determine whether a system satisfies certain required properties. The typical approach to verifying propertie...
Dimitra Giannakopoulou, Corina S. Pasareanu, Howar...
IGPL
2006
110views more  IGPL 2006»
14 years 9 months ago
Adaptive Model Checking
Abstract. We consider the case where inconsistencies are present between a system and its corresponding model, used for automatic verification. Such inconsistencies can be the resu...
Alex Groce, Doron Peled, Mihalis Yannakakis
ICCAD
2004
IEEE
191views Hardware» more  ICCAD 2004»
15 years 6 months ago
Checking consistency of C and Verilog using predicate abstraction and induction
edicate Abstraction and Induction Edmund Clarke Daniel Kroening June 25, 2004 CMU-CS-04-131 School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 It is common...
Daniel Kroening, Edmund M. Clarke
76
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FMCAD
2000
Springer
15 years 1 months ago
B2M: A Semantic Based Tool for BLIF Hardware Descriptions
BLIF is a hardware description language designed for the hierarchical description of sequential circuits. We give a denotational semantics for BLIF-MV, a popular dialect of BLIF, t...
David A. Basin, Stefan Friedrich, Sebastian Mö...