557 search results - page 26 / 112 » Automatic Abstraction for Verification of Timed Circuits and... |
SIBGRAPI
2000
IEEE
15 years 2 months ago
2000
IEEE
This work has as main objective to present an off-line signature verification system. It is basically divided into three parts. The first one demonstrates a pre-processing process,...
FORMATS
2007
Springer
15 years 1 months ago
2007
Springer
Abstract. We describe a partial order reduction technique for a realtime component model. Components are described as timed automata with data ports, which can be composed in stati...
DAC
2003
ACM
15 years 10 months ago
2003
ACM
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
ICCAD
2000
IEEE
15 years 2 months ago
2000
IEEE
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
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CAV
2003
Springer
15 years 1 months ago
2003
Springer
odular Abstraction Refinement Thomas A. Henzinger1 , Ranjit Jhala1 , Rupak Majumdar1 , and Shaz Qadeer2 1 University of California, Berkeley 2 Microsoft Research, Redmond Abstract....