557 search results - page 36 / 112 » Automatic Abstraction for Verification of Timed Circuits and... |
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Circuits using nano-meter technologies are becoming increasingly vulnerable to signal interference from multiple noise sources as well as radiation-induced soft errors. One way to...
105
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ICSE
2004
IEEE-ACM
15 years 9 months ago
2004
IEEE-ACM
Model checking is an automated technique that can be used to determine whether a system satisfies certain required properties. To address the "state explosion" problem a...
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
– Clocking is an essential component of any embedded system design. However, traditional design techniques are either short of clocking support or too complex for users. The Unif...
EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
109
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DAC
2004
ACM
15 years 1 months ago
2004
ACM
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...