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HASE
2008
IEEE
14 years 9 months ago
Aiding Modular Design and Verification of Safety-Critical Time-Triggered Systems by Use of Executable Formal Specifications
Designing safety-critical systems is a complex process, and especially when the design is carried out at different f abstraction where the correctness of the design at one level i...
Kohei Sakurai, Péter Bokor, Neeraj Suri
TABLEAUX
1998
Springer
15 years 1 months ago
Model Checking: Historical Perspective and Example (Extended Abstract)
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
Edmund M. Clarke, Sergey Berezin
DAC
1990
ACM
15 years 1 months ago
Timing Verification Using HDTV
In this paper, we provide an overview of a system designed for verifying the consistency of timing specifications for digital circuits. The utility of the system comes from the ne...
Alan R. Martello, Steven P. Levitan, Donald M. Chi...
FORMATS
2009
Springer
15 years 1 months ago
Safe Runtime Verification of Real-Time Properties
Abstract. Introducing a monitor on a system typically changes the system's behaviour by slowing the system down and increasing memory consumption. This may possibly result in ...
Christian Colombo, Gordon J. Pace, Gerardo Schneid...
FMCAD
2008
Springer
14 years 11 months ago
Word-Level Sequential Memory Abstraction for Model Checking
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
Per Bjesse