Sciweavers

557 search results - page 9 / 112
» Automatic Abstraction for Verification of Timed Circuits and...
Sort
View
TC
1998
14 years 9 months ago
Abstraction Techniques for Validation Coverage Analysis and Test Generation
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Ho...
81
Voted
VLSID
1999
IEEE
122views VLSI» more  VLSID 1999»
15 years 1 months ago
Formal Verification of an ARM Processor
This paper presents a detailed description of the application of a formal verification methodology to an ARM processor. The processor, a hybrid between the ARM7 and the StrongARM ...
Vishnu A. Patankar, Alok Jain, Randal E. Bryant
DATESO
2010
150views Database» more  DATESO 2010»
14 years 7 months ago
Modeling and Verification of Priority Assignment in Real-Time Databases Using Uppaal
Abstract. Real-time database management systems (RTDBMS) are recently subject of an intensive research. Model checking algorithms and verification tools are of great concern as wel...
Martin Kot
CAV
2007
Springer
227views Hardware» more  CAV 2007»
15 years 1 months ago
The TASM Toolset: Specification, Simulation, and Formal Verification of Real-Time Systems
Abstract. In this paper, we describe the features of the Timed Abstract State Machine toolset. The toolset implements the features of the Timed Abstract State Machine (TASM) langua...
Martin Ouimet, Kristina Lundqvist
ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...