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» Automatic Generation of Block-Recursive Codes
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FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
15 years 3 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
ECBS
2005
IEEE
110views Hardware» more  ECBS 2005»
15 years 3 months ago
Synthesis of C++ Software from Verifiable CSPm Specifications
CSP++ is an object-oriented application framework for execution of CSP specifications that have been automatically synthesized into C++ source code by the cspt translator. We desc...
Stephen Doxsee, William B. Gardner
AOSD
2011
ACM
14 years 1 months ago
An aspect-oriented approach for implementing evolutionary computation applications
Object-oriented frameworks support design and code reuse for specific application domains. To facilitate the development of evolutionary computation (EC) programs, such as geneti...
Andres J. Ramirez, Adam C. Jensen, Betty H. C. Che...
EUROMICRO
2003
IEEE
15 years 3 months ago
Enforcing a lips Usage Policy for CORBA Components
Software components promise easy reuse, dependability, and simplified development. Problems arise when implicit assumptions about the use of the component are encoded in the imple...
Wayne DePrince Jr., Christine Hofmeister
DATE
2008
IEEE
168views Hardware» more  DATE 2008»
15 years 4 months ago
Cycle-approximate Retargetable Performance Estimation at the Transaction Level
This paper presents a novel cycle-approximate performance estimation technique for automatically generated transaction level models (TLMs) for heterogeneous multicore designs. The...
Yonghyun Hwang, Samar Abdi, Daniel Gajski