327 search results - page 42 / 66 » Automatic Generation of DAG Parallelism |
144
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PPOPP
2010
ACM
16 years 1 months ago
2010
ACM
We present a static analysis for the automatic generation of symbolic prefetches in a transactional distributed shared memory. A symbolic prefetch specifies the first object to be...
138
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NCA
2005
IEEE
15 years 10 months ago
2005
IEEE
This paper deals with general nested loops and proposes a novel scheduling methodology for reducing the communication cost of parallel programs. General loops contain complex loop...
134
Voted
PARELEC
2002
IEEE
15 years 9 months ago
2002
IEEE
Many practical applications generate irregular, nonbalanced divide-and-conquer trees which have different depths, possibly also different numbers of successors at different levels...
190
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FCCM
2011
IEEE
14 years 8 months ago
2011
IEEE
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
191
Voted
ECBS
1996
IEEE
15 years 8 months ago
1996
IEEE
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...