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DDECS
2007
IEEE
127views Hardware» more  DDECS 2007»
15 years 6 months ago
Instance Generation for SAT-based ATPG
— Recently, there is a renewed interest in Automatic Test Pattern Generation (ATPG) based on Boolean Satisfiability (SAT). This results from the availability of very powerful SA...
Daniel Tille, Görschwin Fey, Rolf Drechsler
DDECS
2008
IEEE
97views Hardware» more  DDECS 2008»
15 years 6 months ago
Incremental SAT Instance Generation for SAT-based ATPG
— Due to ever increasing design sizes more efficient tools for Automatic Test Pattern Generation (ATPG) are needed. Recently ATPG based on Boolean satisfiability (SAT) has been ...
Daniel Tille, Rolf Drechsler
DIAGRAMS
2004
Springer
15 years 5 months ago
Generating Readable Proofs: A Heuristic Approach to Theorem Proving With Spider Diagrams
An important aim of diagrammatic reasoning is to make it easier for people to create and understand logical arguments. We have worked on spider diagrams, which visually express log...
Jean Flower, Judith Masthoff, Gem Stapleton
EDOC
2003
IEEE
15 years 5 months ago
Addressing Computational Viewpoint Design
Distributed System design is a highly complicated and non-trivial task. The problem is characterised by the need to design multi-threaded, multi-processor, and multimedia systems....
David H. Akehurst, John Derrick, A. Gill Waters
ACSC
2004
IEEE
15 years 3 months ago
Automatic Derivation of Loop Termination Conditions to Support Verification
This paper introduces a repeatable and constructive approach to the analysis of loop progress and termination conditions in imperative programs. It is applicable to all loops for ...
Daniel Powell