Sciweavers

65 search results - page 3 / 13
» Automatic Generation of Modular Multipliers for FPGA Applica...
Sort
View
71
Voted
ICRA
2003
IEEE
146views Robotics» more  ICRA 2003»
15 years 2 months ago
Automatic locomotion pattern generation for modular robots
Locomotion is considered as most basic function of robots. In the case of ordinary robots, they are not needed to change locomotion pattern because their configurations are consta...
Akiya Kamimura, Haruhisa Kurokawa, Eiichi Yoshida,...
FCCM
1998
IEEE
113views VLSI» more  FCCM 1998»
15 years 1 months ago
PAM-Blox: High Performance FPGA Design for Adaptive Computing
PAM-Blox are object-oriented circuit generators on top of the PCI Pamette design environment, PamDC. High- performance FPGA design for adaptive computing is simplified by using a ...
Oskar Mencer, Martin Morf, Michael J. Flynn
FPL
2009
Springer
85views Hardware» more  FPL 2009»
15 years 2 months ago
Generating high-performance custom floating-point pipelines
Custom operators, working at custom precisions, are a key ingredient to fully exploit the FPGA flexibility advantage for high-performance computing. Unfortunately, such operators...
Florent de Dinechin, Cristian Klein, Bogdan Pasca
DAC
2003
ACM
15 years 10 months ago
Compiler-generated communication for pipelined FPGA applications
In this paper, we describe a set of compiler analyses and an implementation that automatically map a sequential and un-annotated C program into a pipelined implementation, targete...
Heidi E. Ziegler, Mary W. Hall, Pedro C. Diniz
80
Voted
GLVLSI
2007
IEEE
141views VLSI» more  GLVLSI 2007»
15 years 3 months ago
Transition-activity aware design of reduction-stages for parallel multipliers
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Osc...