65 search results - page 5 / 13 » Automatic Generation of Modular Multipliers for FPGA Applica... |
CORR
2008
Springer
14 years 9 months ago
2008
Springer
Synchronous languages rely on formal methods to ease the development of applications in an efficient and reusable way. Formal methods have been advocated as a means of increasing t...
87
Voted
CAI
2004
Springer
14 years 9 months ago
2004
Springer
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...
86
Voted
FPL
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. We propose CUSTARD — CUStomisable Threaded ARchitecture — a soft processor design space that combines support for multiple hardware threads and automatically generate...
ICCAD
2001
IEEE
15 years 6 months ago
2001
IEEE
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
FPGA
2006
ACM
15 years 1 months ago
2006
ACM
A key advantage of soft processors (processors built on an FPGA programmable fabric) over hard processors is that they can be customized to suit an application program's spec...