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ISSS
2002
IEEE
126views Hardware» more  ISSS 2002»
15 years 2 months ago
Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali...
DAC
2003
ACM
15 years 10 months ago
Instruction encoding synthesis for architecture exploration using hierarchical processor models
This paper presents a novel instruction encoding generation technique for use in architecture exploration for application specific processors. The underlying exploration methodolo...
Achim Nohl, Volker Greive, Gunnar Braun, Andreas H...
TVLSI
2008
152views more  TVLSI 2008»
14 years 9 months ago
MMV: A Metamodeling Based Microprocessor Validation Environment
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
CASES
2007
ACM
15 years 1 months ago
Compiler generation from structural architecture descriptions
With increasing complexity of modern embedded systems, the availability of highly optimizing compilers becomes more and more important. At the same time, application specific inst...
Florian Brandner, Dietmar Ebner, Andreas Krall
DATE
2008
IEEE
113views Hardware» more  DATE 2008»
15 years 4 months ago
Random Stimulus Generation using Entropy and XOR Constraints
Despite the growing research effort in formal verification, constraint-based random simulation remains an integral part of design validation, especially for large design componen...
Stephen Plaza, Igor L. Markov, Valeria Bertacco