146 search results - page 28 / 30 » Automatic Optimization of Parallel Dataflow Programs |
78
Voted
ICS
2009
Tsinghua U.
15 years 4 months ago
2009
Tsinghua U.
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
RTAS
2008
IEEE
15 years 3 months ago
2008
IEEE
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
85
Voted
ICS
2009
Tsinghua U.
15 years 2 months ago
2009
Tsinghua U.
Modern GPUs offer much computing power at a very modest cost. Even though CUDA and other related recent developments are accelerating the use of GPUs for general purpose applicati...
GECCO
2007
Springer
15 years 3 months ago
2007
Springer
We propose that the behaviour of non-linear media can be controlled automatically through coevolutionary systems. By extension, forms of unconventional computing, i.e., massively ...