307 search results - page 19 / 62 » Automatic Parallelization Techniques for the EM-4 |
117
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PPOPP
2009
ACM
16 years 8 days ago
2009
ACM
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
128
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SASP
2008
IEEE
15 years 6 months ago
2008
IEEE
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
97
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CGO
2010
IEEE
15 years 6 months ago
2010
IEEE
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
HPCA
2006
IEEE
16 years 2 days ago
2006
IEEE
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
IPPS
2006
IEEE
15 years 5 months ago
2006
IEEE
Models of simulation program with integrated circuit emphasis (SPICE) are currently playing a central role in the connection between circuit design and chip fabrication communitie...