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» Automatic Parallelization Techniques for the EM-4
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ASAP
2005
IEEE
108views Hardware» more  ASAP 2005»
15 years 7 months ago
Using Symbolic Feasibility Tests during Design Space Exploration of Heterogeneous Multi-Processor Systems
The task of automatic design space exploration of heterogeneous multi-processor systems is often tackled with Evolutionary Algorithms. In this paper, we propose a novel approach i...
Thomas Schlichter, Christian Haubelt, Frank Hannig...
CISIS
2008
IEEE
15 years 8 months ago
Inferring the Function of Genes from Synthetic Lethal Mutations
—Techniques for detecting synthetic lethal mutations in double gene deletion experiments are emerging as powerful tool for analysing genes in parallel or overlapping pathways wit...
Oliver Ray, Christopher H. Bryant
DAC
2003
ACM
16 years 2 months ago
Compiler-generated communication for pipelined FPGA applications
In this paper, we describe a set of compiler analyses and an implementation that automatically map a sequential and un-annotated C program into a pipelined implementation, targete...
Heidi E. Ziegler, Mary W. Hall, Pedro C. Diniz
PVM
2010
Springer
15 years 9 days ago
Dodging the Cost of Unavoidable Memory Copies in Message Logging Protocols
Abstract. With the number of computing elements spiraling to hundred of thousands in modern HPC systems, failures are common events. Few applications are nevertheless fault toleran...
George Bosilca, Aurelien Bouteiller, Thomas H&eacu...
ICSE
2003
IEEE-ACM
16 years 2 months ago
Computer-Assisted Assume/Guarantee Reasoning with VeriSoft
We show how the state space exploration tool VeriSoft can be used to analyze parallel C/C++ programs compositionally. VeriSoft is used to check assume/guarantee specifications of ...
Jürgen Dingel