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» Automatic Parallelization Techniques for the EM-4
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86
Voted
VLSID
2009
IEEE
150views VLSI» more  VLSID 2009»
15 years 10 months ago
TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis
We present the automatic test pattern generator TIGUAN based on a thread-parallel SAT solver. Due to a tight integration of the SAT engine into the ATPG algorithm and a carefully ...
Alejandro Czutro, Ilia Polian, Matthew D. T. Lewis...
CW
2008
IEEE
15 years 4 months ago
Automatic Surface Scanning of 3D Artifacts
—This paper describes an automatic 3D surface scanning technique using a 3D scanner. It allows the acquisition of a complete surface model of a 3D artifact without any manual reg...
Shiaofen Fang, Basil George, Mathew Palakal
76
Voted
IPPS
2006
IEEE
15 years 3 months ago
Automatic application-specific microarchitecture reconfiguration
Applications for constrained embedded systems are subject to strict time constraints and restrictive resource utilization. With soft core processors, application developers can cu...
Shobana Padmanabhan, Ron K. Cytron, Roger D. Chamb...
CGO
2008
IEEE
15 years 4 months ago
Spice: speculative parallel iteration chunk execution
The recent trend in the processor industry of packing multiple processor cores in a chip has increased the importance of automatic techniques for extracting thread level paralleli...
Easwaran Raman, Neil Vachharajani, Ram Rangan, Dav...
COSPS
2001
Springer
15 years 2 months ago
Automatic Array Privatization
Abstract. Array privatization is one of the most e ective transformations for the exploitation of parallelism. In this paper, we present a technique for automatic array privatizati...
Peng Tu, David A. Padua