365 search results - page 43 / 73 » Automatic Performance Debugging of SPMD Parallel Programs |
HICSS
2006
IEEE
15 years 3 months ago
2006
IEEE
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
ICCS
2005
Springer
15 years 3 months ago
2005
Springer
Cray X1 Fortran and C/C++ compilers provide a number of loop transformations, notably vectorization and multistreaming, in order to exploit the multistreaming processor (MSP) hard...
103
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PPOPP
2009
ACM
15 years 10 months ago
2009
ACM
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
104
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FCCM
2002
IEEE
15 years 2 months ago
2002
IEEE
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
IPPS
2000
IEEE
15 years 2 months ago
2000
IEEE
Execution behavior of a Java application can be nondeterministic due to concurrent threads of execution, thread scheduling, and variable network delays. This nondeterminism in Jav...