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» Automatic Performance Debugging of SPMD Parallel Programs
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POPL
2006
ACM
15 years 10 months ago
Autolocker: synchronization inference for atomic sections
The movement to multi-core processors increases the need for simpler, more robust parallel programming models. Atomic sections have been widely recognized for their ease of use. T...
Bill McCloskey, Feng Zhou, David Gay, Eric A. Brew...
IPPS
2002
IEEE
15 years 2 months ago
Implementing the NAS Benchmark MG in SAC
SAC is a purely functional array processing language designed with numerical applications in mind. It supports generic, high-level program specifications in the style of APL. How...
Clemens Grelck
ICPADS
2010
IEEE
14 years 7 months ago
GMH: A Message Passing Toolkit for GPU Clusters
Driven by the market demand for high-definition 3D graphics, commodity graphics processing units (GPUs) have evolved into highly parallel, multi-threaded, many-core processors, whi...
Jie Chen, William A. Watson III, Weizhen Mao
FCCM
2011
IEEE
220views VLSI» more  FCCM 2011»
14 years 1 months ago
Reducing the Energy Cost of Irregular Code Bases in Soft Processor Systems
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
Manish Arora, Jack Sampson, Nathan Goulding-Hotta,...
CLUSTER
2002
IEEE
14 years 9 months ago
ZENTURIO: An Experiment Management System for Cluster and Grid Computing
The need to conduct and manage large sets of experiments for scientific applications dramatically increased over the last decade. However, there is still very little tool support ...
Radu Prodan, Thomas Fahringer