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» Automatic Performance Debugging of SPMD Parallel Programs
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IEEEPACT
2009
IEEE
15 years 4 months ago
Chainsaw: Using Binary Matching for Relative Instruction Mix Comparison
With advances in hardware, instruction set architectures are undergoing continual evolution. As a result, compilers are under constant pressure to adapt and take full advantage of...
Tipp Moseley, Dirk Grunwald, Ramesh Peri
IEEEPACT
2005
IEEE
15 years 3 months ago
Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
Yonghong Song, Spiros Kalogeropulos, Partha Tiruma...
IPPS
1996
IEEE
15 years 1 months ago
An Adaptive Approach to Data Placement
Programming distributed-memory machines requires careful placement of datato balance the computationalload among the nodes and minimize excess data movement between the nodes. Mos...
David K. Lowenthal, Gregory R. Andrews
PODC
2000
ACM
15 years 2 months ago
Garbage collection of timestamped data in Stampede
Stampede is a parallel programming system to facilitate the programming of interactive multimedia applications on clusters of SMPs. In a Stampede application, a variable number of...
Rishiyur S. Nikhil, Umakishore Ramachandran
IPPS
2005
IEEE
15 years 3 months ago
An Empirical Study On the Vectorization of Multimedia Applications for Multimedia Extensions
Multimedia extensions (MME) are architectural extensions to general-purpose processors to boost the performance of multimedia workloads. Today, in-line assembly code, intrinsic fu...
Gang Ren, Peng Wu, David A. Padua