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ISCA
2003
IEEE
120views Hardware» more  ISCA 2003»
15 years 8 months ago
ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes
While removing software bugs consumes vast amounts of human time, hardware support for debugging in modern computers remains rudimentary. Fortunately, we show that mechanisms for ...
Milos Prvulovic, Josep Torrellas
SOSP
2007
ACM
15 years 11 months ago
Bouncer: securing software by blocking bad input
Attackers exploit software vulnerabilities to control or crash programs. Bouncer uses existing software instrumentation techniques to detect attacks and it generates filters auto...
Manuel Costa, Miguel Castro, Lidong Zhou, Lintao Z...
PPPJ
2009
ACM
15 years 9 months ago
Tracking performance across software revisions
Repository-based revision control systems such as CVS, RCS, Subversion, and GIT, are extremely useful tools that enable software developers to concurrently modify source code, man...
Nagy Mostafa, Chandra Krintz
ACL2
2006
ACM
15 years 8 months ago
A verifying core for a cryptographic language compiler
A verifying compiler is one that emits both object code and a proof of correspondence between object and source code.1 We report the use of ACL2 in building a verifying compiler f...
Lee Pike, Mark Shields, John Matthews
ASPLOS
2006
ACM
15 years 8 months ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal