Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
Program dynamic optimization, adaptive to runtime behavior changes, has become increasingly important for both performance and energy savings. However, most runtime optimizations o...
Data streams are a prevalent and growing source of timely data. As streams become more prevalent, richer interrogation of the contents of the streams are required. Value of the con...
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...