42 search results - page 4 / 9 » Automatic Test Pattern Generation for Resistive Bridging Fau... |
VTS
2008
IEEE
15 years 3 months ago
2008
IEEE
Timing-related defects are becoming increasingly important in nanometer technology designs. Small delay variations induced by crosstalk, process variations, powersupply noise, as ...
DAC
1997
ACM
15 years 1 months ago
1997
ACM
This paper presents a novel approach for automatic test pattern generation of asynchronous circuits. The techniques used for this purpose assume that the circuit can only be exerc...
ASPDAC
2009
ACM
15 years 3 months ago
2009
ACM
Low power circuits have become a necessary part in modern designs. Retention flip-flop is one of the most important components in low power designs. Conventional test methodologie...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
In this paper, we propose a new circuit transformation technique in conjunction with the use of a special diagnostic test pattern, named SO-SLAT pattern, to achieve higher multipl...
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
Abstract— In this paper we study the testability of circuits derived from Binary Decision Diagrams (BDDs) under the bridging fault model. It is shown that testability can be form...