302 search results - page 29 / 61 » Automatic Verification of Timed Circuits |
113
Voted
FM
2009
Springer
14 years 10 months ago
2009
Springer
Abstract. We propose an approach to automatic verification of realtime systems against scenario-based requirements. A real-time system is modeled as a network of Timed Automata (TA...
115
Voted
CASES
2007
ACM
15 years 4 months ago
2007
ACM
Embedded systems are often used in safety-critical environments. Thus, thorough testing of them is mandatory. A quite active research area is the automatic test-case generation fo...
FCCM
2008
IEEE
15 years 7 months ago
2008
IEEE
Power reduction is becoming more important as circuit size increases. This paper presents a tool called PowerCutter which employs accuracy-guaranteed word-length optimization to r...
105
Voted
FPT
2005
IEEE
15 years 6 months ago
2005
IEEE
A methodology for supporting dynamic voltage scaling (DVS) on commercial FPGAs is described. A logic delay measurement circuit (LDMC) is used to determine the speed of an inverter...
143
click to vote
DLT
2009
14 years 10 months ago
2009
Abstract. Temporal logics are a well investigated formalism for the specification and verification of reactive systems. Using formal verification techniques, we can ensure the corr...