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» Automatic Verification of Timed Circuits
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VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
16 years 2 days ago
A Module Checking Based Converter Synthesis Approach for SoCs
Protocol conversion involves the use of a converter to control communication between two or more protocols such that desired system-level specifications can be satisfied. We invest...
Roopak Sinha, Partha S. Roop, Samik Basu
ICICIC
2006
IEEE
15 years 5 months ago
Fingerprint Identification Based on Frequency Texture Analysis
Nowadays the AFIS (Automatic fingerprint Identification system) plays more and more important roles in various applications such as access control, ATM card verification and crimi...
Juncao Li, Yong Zhang, Wenhai Kong, Xiamu Niu
EUROMICRO
1999
IEEE
15 years 4 months ago
Software Synthesis for System Level Design Using Process Execution Trees
Software synthesis for system level design languages becomes feasible because the current technology, pricing and application trends will most likely alleviate the industrial empha...
Leo J. van Bokhoven, Jeroen Voeten, Marc Geilen
COMPSEC
2004
104views more  COMPSEC 2004»
14 years 11 months ago
Formal support for certificate management policies
Traditionally, creation and revocation of certificates are governed by policies that are carried manually, off-line, by trusted agents. This approach to certificate management is ...
Victoria Ungureanu
ASPDAC
2006
ACM
74views Hardware» more  ASPDAC 2006»
15 years 5 months ago
Macromodelling oscillators using Krylov-subspace methods
— We present an efficient method for automatically extracting unified amplitude/phase macromodels of arbitrary oscillators from their SPICE-level circuit descriptions. Such com...
Xiaolue Lai, Jaijeet S. Roychowdhury