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» Automatic Verification of Timed Circuits
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POPL
2000
ACM
15 years 3 months ago
Resource Bound Certification
Various code certification systems allow the certification and static verification of important safety properties such as memory and control-flow safety. These systems are valuabl...
Karl Crary, Stephanie Weirich
FPGA
2010
ACM
191views FPGA» more  FPGA 2010»
15 years 6 months ago
Voter insertion algorithms for FPGA designs using triple modular redundancy
Triple Modular Redundancy (TMR) is a common reliability technique for mitigating single event upsets (SEUs) in FPGA designs operating in radiation environments. For FPGA systems t...
Jonathan M. Johnson, Michael J. Wirthlin
GECCO
2006
Springer
215views Optimization» more  GECCO 2006»
15 years 3 months ago
A multi-chromosome approach to standard and embedded cartesian genetic programming
Embedded Cartesian Genetic Programming (ECGP) is an extension of Cartesian Genetic Programming (CGP) that can automatically acquire, evolve and re-use partial solutions in the for...
James Alfred Walker, Julian Francis Miller, Rachel...
CADE
2007
Springer
15 years 12 months ago
Towards Efficient Satisfiability Checking for Boolean Algebra with Presburger Arithmetic
Boolean Algebra with Presburger Arithmetic (BAPA) is a decidable logic that combines 1) Boolean algebra of sets of uninterpreted elements (BA) and 2) Presburger arithmetic (PA). BA...
Viktor Kuncak, Martin C. Rinard
DAC
2005
ACM
16 years 19 days ago
Automated nonlinear Macromodelling of output buffers for high-speed digital applications
We present applications of a recently developed automated nonlinear macromodelling approach to the important problem of macromodelling high-speed output buffers/drivers. Good nonl...
Ning Dong, Jaijeet S. Roychowdhury