302 search results - page 56 / 61 » Automatic Verification of Timed Circuits |
124
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ICCAD
2001
IEEE
15 years 8 months ago
2001
IEEE
The increasing popularity of SAT and BDD techniques in verification and synthesis encourages the search for additional speed-ups. Since typical SAT and BDD algorithms are exponent...
85
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ICNP
1999
IEEE
15 years 4 months ago
1999
IEEE
In this paper we present a new approach for the automated mapping of formal descriptions into activity thread implementations. Our approach resolves semantic conflicts by reorderi...
153
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CAV
2003
Springer
15 years 3 months ago
2003
Springer
odular Abstraction Refinement Thomas A. Henzinger1 , Ranjit Jhala1 , Rupak Majumdar1 , and Shaz Qadeer2 1 University of California, Berkeley 2 Microsoft Research, Redmond Abstract....
121
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ISCA
2011
IEEE
14 years 3 months ago
2011
IEEE
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
DAC
2009
ACM
16 years 20 days ago
2009
ACM
Metal-only ECO realizes the last-minute design changes by revising the photomasks of metal layers only. This task is challenging because the pre-injected spare cells are limited b...