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» Automatic Verification of Timed Circuits
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GLVLSI
2009
IEEE
150views VLSI» more  GLVLSI 2009»
15 years 6 months ago
Contradictory antecedent debugging in bounded model checking
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...
Daniel Große, Robert Wille, Ulrich Kühn...
84
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DATE
2008
IEEE
103views Hardware» more  DATE 2008»
15 years 6 months ago
Novel Pin Assignment Algorithms for Components with Very High Pin Counts
The wiring effort and thus, the routability of electronic designs such as printed circuit boards, multi chip modules and single chip modules largely depends on the assignment of s...
Tilo Meister, Jens Lienig, Gisbert Thomke
DATE
2007
IEEE
112views Hardware» more  DATE 2007»
15 years 6 months ago
Tool-support for the analysis of hybrid systems and models
This paper introduces a method and tool-support for the automatic analysis and verification of hybrid and embedded control systems, whose continuous dynamics are often modelled u...
Andreas Bauer 0002, Markus Pister, Michael Tautsch...
100
Voted
PCI
2005
Springer
15 years 5 months ago
Towards In-Situ Data Storage in Sensor Databases
Abstract. The advances in wireless communications along with the exponential growth of transistors per integrated circuit lead to a rapid evolution of Wireless Sensor Devices (WSDs...
Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimi...
SIGSOFT
2003
ACM
16 years 12 days ago
Regression testing of GUIs
Although graphical user interfaces (GUIs) constitute a large part of the software being developed today and are typically created using rapid prototyping, there are no effective r...
Atif M. Memon, Mary Lou Soffa