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ISCA
2011
IEEE
271views Hardware» more  ISCA 2011»
14 years 2 months ago
CRIB: consolidated rename, issue, and bypass
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...
Erika Gunadi, Mikko H. Lipasti
CASES
2007
ACM
15 years 2 months ago
Application driven embedded system design: a face recognition case study
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
Karthik Ramani, Al Davis
PDCN
2007
14 years 11 months ago
Design and evaluation of an auto-memoization processor
This paper describes the design and evaluation of an auto-memoization processor. The major point of this proposal is to detect the multilevel functions and loops with no additiona...
Tomoaki Tsumura, Ikuma Suzuki, Yasuki Ikeuchi, Hir...
DATE
2002
IEEE
146views Hardware» more  DATE 2002»
15 years 3 months ago
Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design
To enable fast and accurate evaluation of HW/SW implementation choices of on-chip communication, we present a method to automatically generate timed OS simulation models. The meth...
Sungjoo Yoo, Gabriela Nicolescu, Lovic Gauthier, A...
81
Voted
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
15 years 10 months ago
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul